III Sem E&C Engg. LOGIC DESIGN LAB (10ESL38)
Dept. of E&C K.I.T - Tiptur
18
Pin Diagram of IC 74153( Dual 4 : 1 Mux)
IC 74153
Enable Ea
1 16
Vcc
Select S1
2 15
Enable Eb
D3(a)
3 14
Select S0
D2(a)
4 13
D3(b)
D1(a)
5 12
D2(b)
D0(a)
6 11
D1(b)
Ya (O/P)
7 10
D0(b)
Gnd
8 9
Yb (O/P)
Function table:
Inputs Output Remarks
Data Select Data Inputs Enable
Data Output
S1
S0
D0
D1
D2
D3
E
Y
X X X X X X 1 0 Y=0
0 0 0 X X X 0 0
Y=D0
0 0 1 X X X 0 1
0 1 X 0 X X 0 0
Y=D1
0 1 X 1 X X 0 1
1 0 X X 0 X 0 0
Y=D2
1 0 X X 1 X 0 1
1 1 X X X 0 0 0
Y=D3
1 1 X X X 1 0 1
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